The coalescing happens in a loop making changes to the interference graph directly which are not good,
and complete interference graph reconstruction on the outer loop which happens less frequently but which is the best.
Using this map we can look at the right and middle columns in the next image to see which operands are coalesced.
On the right is the original instructions in the middle is register coalescing which removes several instructions, and on the left is the rest of the register allocator with graph coloring.
Graph Coloring:
After coalescing graph coloring happens, at this stage some nodes are removed by coalescing. So it is faster:
Finally you can look at the graph coloring on the left column:
If you want to look into the code:
